I couldn’t be more pleased to be joining UltraSoC at what I believe is a tremendously exciting time for the company.
I’ve spent most of my working life in and around the semiconductor industry and I have to say it’s been a rewarding ride. We’ve been a motive force behind pretty much every technological advance of recent years – personal computing, the Internet and wireless communications to name but a few. Today, more and more development takes place in software and one of the big trends of the day is virtualization – but this move, too, remains contingent on our ability to invent hardware with capabilities that, just 10 years ago, had only been dreamed of.
Most recently, not everybody has seen the chip business in such a positive light. People have even started looking back to a kind of mythic heyday, pointing out that our industry’s fundamental drivers – Moore’s Law and Dennard scaling – have run out of steam.
Well, the landscape has indeed changed: and that’s where UltraSoC comes in. We now have to be much smarter about designing hardware. Chips are complex, with multiple heterogenous cores. Building a complex SoC requires integrating multiple different blocks from many different vendors. Transistor count is effectively limitless. Traditional development tools have been low level (JTAG) or where they are richer, have only worked within one vendor’s silo. SoC debug is the new logjam in the whole process of embedded systems design – and UltraSoC’s technology solves that problem.
In the (admittedly narrow) focus of the semiconductor chip designer, these developments are seismic – I would argue that the emergence of tools like UltraDebug is as important today as the advent of logic synthesis in the 1980s. The complex interactions of software and multicore hardware across a network- or bus-based interconnect within today’s SoCs are beyond the capabilities of a human engineer to debug. More than one third of the effort required to tape out a complex SoC is spent on debugging.
Time to market pressures are intensifying and having delays because of debug could be crippling.
But by adding hardware-based universal debug capabilities to every device, that problem can be solved. We can enable an integrated coherent view of the SoC, with hardware and software in one environment, and with the ability to access all the different IP blocks, from different vendors or custom logic.
The implications for the chip designer are only the beginning – and this is really what “sold” me on joining UltraSoC.
By “baking in” these capabilities within the silicon, we give system designers the ability to build in capabilities like in-field analytics, forensics and dynamics to continue development even after the product containing the SoC has shipped. Products can be performance-optimized in-service – improving their operation based on real-life usage, not just expectations in the lab. Of course, “performance” could mean “power efficiency”: doing the same job but needing less energy as a result of better understanding of the system as a whole. Troubleshooting and diagnostics become design fundamentals, not a mere afterthought. The net result is not just an easier life for the SoC designer, but better products overall.
This is the vision that I’ll be working over the coming months and years to realize. We’ve got a talented team here who’ve already cracked the fundamental technology challenges. Now we set about making the vision a reality.