Advanced debug environment for multicore processor designs used for both hardware and simulation
UltraSoC and Imperas today announced a wide-ranging partnership that will provide developers of multicore systems on chip (SoCs) with a powerful combination of embedded analytics and virtual platform technologies. Under the terms of the agreement, UltraSoC will incorporate key elements of Imperas’ development environment into its tools offering, giving designers a unified system-level pre- and post-silicon development flow, dramatically reducing time-to-revenue and overall development costs.
UltraSoC delivers the industry’s leading independent on-chip monitoring, analytics and debug technology, via a combination of semiconductor IP and associated software. Imperas’ pioneering virtual platforms approach allows software developers to start work at the earliest possible stage in an SoC project, and provides debug tools that give full visibility of the behavior of the entire system. Combining the two companies’ offerings creates a powerful integrated design flow with a common software debug environment that gives a smooth transition as a project develops.
Both companies have a strong pedigree in system-level design approaches, hardware-software integration and multicore architectures: their new combined offering will support all common CPU architectures, including the fast-growing open-standard RISC-V ISA. UltraSoC and Imperas shared a platform at the RISC-V Foundation Pavilion (Booth 2638) at the 55th Design Automation Conference (DAC), in San Francisco from Monday 25 to Wednesday 27 June. See this page for more information about the event.
“Working with Imperas allows us to offer multicore designers a commercial-grade, time-saving and ultimately cost-effective platform to develop and launch industry-leading SoC designs,” said Rupert Baines, CEO of UltraSoC. “RISC-V, Arm, whatever the designer’s choice, we provide a complete and optimized solution. Together, UltraSoC and Imperas can provide a unique solution to the issues of complexity, scale and quality faced by the semiconductor industry. Today’s announcement is a first step in realizing that shared world view of solving the challenge of systemic complexity.”
Simon Davidmann, Founder and CEO of Imperas commented: “UltraSoC offers unique embedded analytics technology, giving developers invaluable insights into the SoC and wider system implications. We are delighted to be working together with a common debug environment that supports both hardware and simulation. The combination of Imperas tools and UltraSoC intelligent analytics will offer developers the best integrated environment for multicore processor designs.”
Charlie Hong-Men Su, PhD, Andes Technology CTO and Senior VP, commented, “Imperas virtual platform solutions and tools help in the early phase of SoC and software development, UltraSoC embedded analytics enables hardware-based debug, development and testing. The combination of hardware and simulation solutions will help our mutual customers design the next generation of complex SoCs.”
For information about Imperas, please visit: www.imperas.com
Click to watch UltraSoC CEO Rupert Baines talk about the benefits of the partnership live on the UltraSoC booth, on the DAC 2018 RISC-V pavilion.