Accelerating AI through hardware – postponed

Accelerating AI through hardware – postponed

The ‘Accelerating AI through hardware’ event has been postponed, given the current coronavirus situation. UltraSoC CSO Aileen Ryan will participate in this event at Bristol University when it has a confirmed new date.  We will update this event page once...
Cambridge RISC-V Meetup

Cambridge RISC-V Meetup

Following our successful first RISC-V Meetup in Cambridge last November, we are pleased to invite you to join us at our second one on Wednesday 19th June 2019, which will take place at Westminster College, Cambridge, and will be hosted by UltraSoC and Imperas...
Imperas guest blog: RISC-V shines at DVCon Europe

Imperas guest blog: RISC-V shines at DVCon Europe

Kevin McDermott, VP Marketing with Imperas, attended DVCon Europe, where three RISC-V Foundation members give an introductory talk on the use of the industry’s leading open source instruction set architecture DVCon Europe has evolved to become the region’s...