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RISC-V Day Tokyo 2019
30 September 2019
UltraSoC are looking forward to participating in RISC-V Day Tokyo 2019, which is taking place on 30th September at the Hitachi Kokubunji (West Tokyo) Plant.
CEO Rupert Baines will be presenting on ‘Embracing a system level approach in the real world: combining Arm and RISC-V in heterogeneous designs.’
There are growing momentums around RISC-V in Japan. In 2018, the domestic RISC-V chip projects started at universities and companies. The translated book “RISC-V Reader” was published and became the Amazon best seller. To our pleasure, more than 50 libraries of “Japanese higher professional school specialized vocational high school tertiary colleges,” the cornerstone of Japanese technical education, purchased one or more copies of this publication. At present, SHC, Techanalye, Hitachi, Ltd., NSITEXE (Denso Semiconductor IP Company), Pezy Computing, Sony LSI Design, University of Tokyo, GHELIA, and AIST(Fastest Growing Scientific Research Agency) have become members of RISC-V Foundation.
To arrange to meet with UltraSoC during the event, please email email@example.com who would be pleased to arrange this.
For more information and to register your place, please visit the event website.