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Next-Generation Hardware for High-Performance Computing Workshop

11 September 2018

UltraSoC are pleased to be participating in the Workshop on Next-Generation Hardware for High-Performance Computing (NG-HPC 2018) which is taking place on 11th September at the University of Bristol.

Gajinder Panesar, UltraSoC CTO, will be presenting on ‘It’s not about the core, it’s about the system‘ at 11.15am. This talk will discuss UltraSoC’s semiconductor IP puts an intelligent analytics infrastructure into the hardware of an SoC, providing intimate visibility of real-world system behavior. that puts intelligent self-analytic capabilities in the SoCs at the heart of today’s consumer electronic, computing and communications products. UltraSoC embedded analytics technology helps solve pressing problems including cybersecurity, functional safety, and the management of complexity. UltraSoC solutions also allow designers to develop SoCs more quickly and cost-effectively. Benefits include robustness against malicious intrusions; enhanced product safety; reduced system power consumption; and better performance – with fine-tuning of end products even after they are deployed in the field.

This workshop aims at being a forum to learn, network and discuss about recent progress in this field. The objective is to have an interesting set of presentations from leading industrialists and academics. The workshop will consist of a series of invited talks to present novel hardware architectures and novel use of that hardware to obtain high-performance and energy efficiency.

Topics of interest include when computation is performed with a combination of different core types such as GPUs (Graphics Processing Units), CPUs (Central Processing Unit) and FPGAs (Field Programmable Gate Arrays) and also be formed with cores capable of executing a common instruction set but with different performance levels and energy requirementsProgramming models able to target these different computing resources with a single piece of code are also relevant as new ways to understand behaviours observed in these complex devices.

The workshop has no registration fee but pre-registration is required for catering purposes. Refreshments and lunch will be provided and are sponsored by the Marionet workshop.

Click here to see the full Agenda and click here to register for this free to attend event.

Venue

University of Bristol, MVB Building, Woodland Road, Department of Electrical and Electronic Engineering, Bristol BS8 1UB.