UltraSoC and Moortec Semiconductor today announced that they are cooperating on system-on-chip (SoC) monitoring and analytics intellectual property (IP) to enable a new generation of Process, Voltage and Temperature (PVT) sensor sub-systems. By integrating UltraSoC’s digital monitoring and optimization capabilities, with Moortec’s industry-leading PVT products this enables powerful, chip-wide infrastructure to improve SoC performance and reliability.
UltraSoC的知识产权提供了独立的系统级体系结构，能够对SoC的内部行为进行非侵入式线速监控，以此帮助工程师深入了解片上子系统、总线和软件间的复杂互动，从而加速研发并降低风险。该公司近日宣布其已为基于RISC-V开源指令集的处理器提供全面支持，并公布了行业首个针对使用ARM® AMBA® 5 Coherent Hub Interface (CHI)的SoC的调试系统。 Continue reading
CAMBRIDGE, UK, 7th December 2016 – UltraSoC today announced that a division of HiSilicon has licensed UltraSoC’s semiconductor intellectual property (IP) for system monitoring, analysis and optimization.
HiSilicon is a division of Huawei and a worldwide leading company providing silicon solutions in digital home, communications and wireless terminals. Continue reading
MOUNTAIN VIEW, CA, 29th November 2016 – BaySand, Codasip, Codeplay and UltraSoC today announced an integrated IoT development platform based on the RISC-V open processor instruction set architecture (ISA). The platform offers an open-standards-based solution that allows designers of systems-on-a-chip (SoCs) for IoT applications to get from concept to silicon with a high level of software integration in record time and substantially de-risks the entire product development process.
CAMBRIDGE, UK, and SAN JOSE, CA, 22nd November 2016
Codasip, the leading RISC-V processor IP provider, and UltraSoC, the leading provider of semiconductor IP for on-chip analytics, performance optimization and hardware-based security and debug, announced a broad collaboration to integrate the Codix-Bk series of RISC-V compliant processor cores seamlessly with the UltraSoC environment. As RISC-V based SoCs enter the mainstream, the need for commercial support with production-quality debug, analysis and bring-up tools become critical. This collaboration provides the RISC-V community with capabilities that go beyond those available to proprietary processors and instruction set architectures (ISAs). Continue reading
New IP extends UltraSoC’s family of protocol-aware monitors for interconnect to ARM AMBA-5 CHI
CAMBRIDGE, UK, 26th October 2016: UltraSoC today extended the capabilities of its on-chip monitoring and analytics semiconductor intellectual property (IP), to include debug, monitoring and analysis features for the ARM® AMBA® 5 Coherent Hub Interface (CHI). The CHI Monitor is the newest in UltraSoC’s family of protocol-aware monitors for interconnect and extends that from bus monitors to debugging and fine-tuning the NoC (network on chip) fabric. Continue reading
Enables faster time-to-market for customer designs
UltraSoC today announced that Imagination Technologies (IMG.L) has licensed the full range of UltraSoC semiconductor IP and software, enabling Imagination to help customers integrate sophisticated monitoring, analytics and security capabilities into system-on-chip (SoC) designs. Continue reading
CAMBRIDGE, United Kingdom, 20th September 2016
UltraSoC, the leading provider of semiconductor IP for on-chip analytics, performance optimization and hardware-based security, today announced that it will provide support within its universal system-on-chip (SoC) debug solution for products based on the RISC-V open-source instruction architecture (ISA). The company also lent its support to the RISC-V Foundation, the non-profit corporation that directs the development and drives the adoption of the RISC-V ISA, which many observers believe will evolve to be “the Linux of the semiconductor industry”. Continue reading
CAMBRIDGE, United Kingdom, and SAN MATEO, CA, 23rd August 2016
UltraSoC and Movidius today announced a licensing agreement under which Movidius will incorporate UltraSoC’s semiconductor IP into its next-generation low-power machine vision systems-on-chip (SoCs). Movidius will combine UltraSoC’s monitoring and analytics intellectual property (IP) and tools, with its own MoviDebug technology, to create a powerful chip-wide debug and communications infrastructure that will support its end-to end product development flow. Continue reading